I have just tried to program a clean pic24 using the Hex file generated but the display does not work.
Its responding to buttons.
Is there anything I have to do to the main program prior?
I am using a pickit3
// 24HJ128GP502 default fuse settings from the pic24 firewingLoader.s file
config FBS = {BWRP_WRPROTECT_OFF}
config FSS = {SWRP_WRPROTECT_OFF}
config FGS = {GWRP_OFF}
config FOSCSEL = {FNOSC_FRCPLL, IESO_OFF}
config FOSC = {POSCMD_NONE, OSCIOFNC_ON, IOL1WAY_OFF, FCKSM_CSECMD}
config FWDT = {WDTPOST_PS256, WINDIS_OFF, FWDTEN_OFF}
config FPOR = {FPWRT_PWR128, ALTI2C_OFF}
config FICD = {ICS_PGD1, JTAGEN_OFF}
imports mplabicd
' these config statements override any previous ones
// 24HJ128GP502 default fuse settings from the pic24 FW bootloader
config FBS = {BWRP_WRPROTECT_OFF}
config FSS = {SWRP_WRPROTECT_OFF}
config FGS = {GWRP_OFF}
config FOSCSEL = {FNOSC_FRCPLL, IESO_OFF}
config FOSC = {POSCMD_NONE, OSCIOFNC_ON, IOL1WAY_OFF, FCKSM_CSECMD}
config FWDT = {WDTPOST_PS256, WINDIS_OFF, FWDTEN_OFF}
config FPOR = {FPWRT_PWR128, ALTI2C_OFF}
config FICD = {ICS_PGD1, JTAGEN_OFF}
Sub Main()
End Sub
macro SetSysClock()
const sysClock = _clock
// Fosc = Fin * (M/N1*N2))
// CLKDIVbits.FRCDIV = 0 (CLKDIV[10:8]) FRC/1= 7.3728MHz
// CLKDIVbits.PLLPOST = N2 (CLKDIV[7:6]) N2: 00=2, 01=4, 11=8
// CLKDIVbits.PLLPRE = 2-N1 (CLKDIV[4:0]) N1 = 2-33
// PLLFBDbits.PLLDIV = M-2
if (sysClock = 80) then // 40 MIPS
const FRCDIV = 0
const PLLPOST = 0
const PLLPRE = 1
const PLLDIV = 63 // 39.94
WREG4 = (CLKDIV and &HF800) or (FRCDIV<<8) or (PLLPOST<<6) or PLLPRE
CLKDIV = WREG4
PLLFBD = PLLDIV
elseif (sysClock = 64) then // 32 MIPS
const FRCDIV = 0
const PLLPOST = 0
const PLLPRE = 1
const PLLDIV = 50 // 31.95
WREG4 = (CLKDIV and &HF800) or (FRCDIV<<8) or (PLLPOST<<6) or PLLPRE
CLKDIV = WREG4
PLLFBD = PLLDIV
elseif (sysClock = 32) then // 16 MIPS
const FRCDIV = 0
const PLLPOST = 1
const PLLPRE = 1
const PLLDIV = 50 // 15.97
WREG4 = (CLKDIV and &HF800) or (FRCDIV<<8) or (PLLPOST<<6) or PLLPRE
CLKDIV = WREG4
PLLFBD = PLLDIV
elseif (sysClock = 16) then // 8 MIPS
const FRCDIV = 0
const PLLPOST = 3
const PLLPRE = 1
const PLLDIV = 50 // 7.99
WREG4 = (CLKDIV and &HF800) or (FRCDIV<<8) or (PLLPOST<<6) or PLLPRE
CLKDIV = WREG4
PLLFBD = PLLDIV
elseif (sysClock = 8) then // 4 MIPS
const FRCDIV = 1 // note: this is outside the VCO range... should use FNOSC_FRC mode
const PLLPOST = 3
const PLLPRE = 1
const PLLDIV = 50
WREG4 = (CLKDIV and &HF800) or (FRCDIV<<8) or (PLLPOST<<6) or PLLPRE
CLKDIV = WREG4
PLLFBD = PLLDIV
else
checkparam(etError, "unsupported system clock freq")
end if
// trim osc for accurate baud (optional)
'OSCTUN = &H03A
// wait until the PLL is locked
while (OSCCON.bits(5) = 0) // check LOCK bit
end while
end macro
config FGS = {GWRP_OFF} // no protection
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